Csep-561-Reading-1D

P4: Programming Protocol-Independent Packet Processors

Forwarding Metamorphosis: Fast Programmable Match-Action Processing in Hardware for SDN

As seems to be a recurring theme as we explore the history of network systems, both of these papers are, generally speaking, trying to solve the same problem: given some inherent complexity, where should we handle it?

The complexity in this case is programming switches within the OpenFlow 1.x framework, circa 2013. The real challenge here is not so much the logical complexity of switching, but how to accomplish this nontrivial switching logic at terabit speeds. Another common goal is reconfigurability in the field. The P4 paper proposes a programming language approach, and the FM paper proposes new hardware.

Both proposals are detailed, seem promising, and importantly do not seem to be exclusionary. My personal bias leads me to like the P4 approach, as I am a PLT and compiler nerd. In particular, I like

• the idea of a well suited domain-specific language for configuring a switch and processing packets,
• separating hardware details from network programming
• having the compiler do the job of actually leveraging the target switch's capabilities

Of course, this approach is not without its drawbacks. In particular, the development of such a performance-oriented compiler and, if P4 is to be successfully broadly adopted, the number of platforms that compiler will need to target, is a daunting task.

However, this critique should be taken in context. Both of these papers are clearly putting out ideas in "alpha" and calling for discussion. Even the FM paper, which has gone to great lengths to design and evaluate a new chip architecture, is ultimately a theoretical proposal. No such chip had actually been made, and undoubtedly this would be a large development effort as well.